/*
 * Copyright (c) 1993-2014, NVIDIA CORPORATION. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */

/* This file is autogenerated by ref2h.pl.  Do not edit */
#define _kind_macros_orig_H_

#define KIND_WORK_CREATION_SKED(k)    (                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE))
#define KIND_WORK_CREATION_HOST(k)    (0 != 0)
#define KIND_WORK_CREATION(k)         (                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0)))

#define KIND_INVALID(k)               (                                      ((k) ==NV_MMU_PTE_KIND_INVALID))
#define KIND_UNDEFINED(k)             (                                      !((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))&&                                      !((k) ==NV_MMU_PTE_KIND_INVALID)&&                                      !((k) ==NV_MMU_PTE_KIND_PITCH)&&                                      !((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)&&                                      !((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)&&                                      !((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)&&                                      !((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)&&                                      !((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)&&                                      !((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)&&                                      !((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)&&                                      !((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)&&                                      !((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)&&                                      !((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)&&                                      !((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)&&                                      !((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S)&&                                      !((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)&&                                      !((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)&&                                      !((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)&&                                      !((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)&&                                      !((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)&&                                      !((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)&&                                      !((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)&&                                      !((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)&&                                      !((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)&&                                      !((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_PITCH(k)                 (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_BLOCKLINEAR(k)           (                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_X8C24))
#define KIND_COMPRESSIBLE(k)          (                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_1Z && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_1Z && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_1Z && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8_2S)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))
#define KIND_SUPPORTED(k)             (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2C)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2Z && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CZ && (k) <= NV_MMU_PTE_KIND_Z24S8_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CZ && (k) <= NV_MMU_PTE_KIND_ZF32_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS8_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) ==NV_MMU_PTE_KIND_C32_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C32_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2CRA && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C64_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2CRA && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_NO_SWIZZLE(k)            (                                      ((k) ==NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_Z(k)                     (                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S))
#define KIND_C(k)                     (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_Z16(k)                   (                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ))
#define KIND_Z24(k)                   (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV))
#define KIND_YUV(k)                   (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID))
#define KIND_YUV_1C(k)                (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID))
#define KIND_Y8B(k)                   (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID))
#define KIND_Y10B(k)                  (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID))
#define KIND_Y12B(k)                  (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID))
#define KIND_ZF32(k)                  (                                      ((k) >=NV_MMU_PTE_KIND_ZF32 && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS))
#define KIND_Z24S8(k)                 (                                      ((k) >=NV_MMU_PTE_KIND_Z24S8 && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV))
#define KIND_S8Z24(k)                 (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24 && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV))
#define KIND_Z24V8(k)                 (                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV))
#define KIND_V8Z24(k)                 (                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV))
#define KIND_16BPP_Z(k)               (                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ))
#define KIND_32BPP_Z(k)               (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ))
#define KIND_64BPP_Z(k)               (                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS))
#define KIND_S8(k)                    (                                      ((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S))
#define KIND_STENCIL(k)               (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24 && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8 && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S))
#define KIND_VCAA(k)                  (                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV))
#define KIND_NO_MS(k)                 (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_2C)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_2Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24 && (k) <= NV_MMU_PTE_KIND_S8Z24_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8 && (k) <= NV_MMU_PTE_KIND_Z24S8_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32 && (k) <= NV_MMU_PTE_KIND_ZF32_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8 && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_2BRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_2C && (k) <= NV_MMU_PTE_KIND_C64_2BRA)||                                      ((k) >=NV_MMU_PTE_KIND_C128_2C && (k) <= NV_MMU_PTE_KIND_C128_2CR)||                                      ((k) >=NV_MMU_PTE_KIND_X8C24 && (k) <= NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_MS2(k)                   (                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS2_2C)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS2_2Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS2_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS2_4CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS2_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS2_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS2_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS2_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS2_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS2_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS2_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS2_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS2_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS2_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS2_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS2_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS2_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS2_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS2_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS2_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C128_MS2_2C && (k) <= NV_MMU_PTE_KIND_C128_MS2_2CR))
#define KIND_MS4(k)                   (                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS4_2C)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS4_2Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS4_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS4_4CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS4_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS4_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS4_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS4_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS4_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS4_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS4_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS4_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CSZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS4_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS4_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C128_MS4_2C && (k) <= NV_MMU_PTE_KIND_C128_MS4_2CR))
#define KIND_MS8(k)                   (                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS8_2C)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS8_2Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS8_4CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS8_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS8_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_2ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS8_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS8_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8 && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_2ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS8_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS8_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_1CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_2CSZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8 && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_1CZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS8_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS8_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS8_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C32_MS8_MS16_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS8_MS16_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C128_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))
#define KIND_MS16(k)                  (                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2C)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS16_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS16_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS16_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS16_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS16_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C32_MS8_MS16_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS8_MS16_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C128_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))
#define KIND_MS4_VC4(k)               (                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC4)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC4_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC4_2CZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC4_2ZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC4_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC4)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC4_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC4_2CZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC4_2ZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC4_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_1CZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_1CZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_2CSZV))
#define KIND_MS4_VC12(k)              (                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC12)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2ZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC12)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2ZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CSZV))
#define KIND_MS8_VC8(k)               (                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC8)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC8_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC8_2CZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC8_2ZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC8_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC8)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC8_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC8_2CZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC8_2ZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC8_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_1CZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_1CZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_2CSZV))
#define KIND_MS8_VC24(k)              (                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2ZV)||                                      ((k) ==NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2ZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1ZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV))
#define KIND_GENERIC(k)               (                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2))
#define KIND_C24(k)                   (                                      ((k) ==NV_MMU_PTE_KIND_X8C24))
#define KIND_C32(k)                   (                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C32_MS8_MS16_2CRA))
#define KIND_C64(k)                   (                                      ((k) >=NV_MMU_PTE_KIND_C64_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS8_MS16_2CRA))
#define KIND_C128(k)                  (                                      ((k) >=NV_MMU_PTE_KIND_C128_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))
#define KIND_COMPBIT_PER_TILE_0(k)    (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_Z16)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8)||                                      ((k) ==NV_MMU_PTE_KIND_S8)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) >=NV_MMU_PTE_KIND_X8C24 && (k) <= NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_COMPBIT_PER_TILE_1(k)    (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_1Z && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_1Z && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_1Z && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS))
#define KIND_COMPBIT_PER_TILE_2(k)    (                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CS && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8_2S)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))
#define KIND_COMPBIT_PER_TILE_4(k)    (                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_4CSZV && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA))
#define KIND_ZBC(k)                   (                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2C)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CS && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_C32_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS2_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS2_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))
#define KIND_ZBC_Z_ONLY(k)            (                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2C)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CZ && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CZ && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV))
#define KIND_ZBC_Z_AND_STENCIL(k)     (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CS && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CS && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS))
#define KIND_VCAA_COMP(k)             (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_4CSZV && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CSZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CSZV))
#define KIND_ZPLANE_COMP(k)           (                                      ((k) >=NV_MMU_PTE_KIND_Z16_2Z && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_1Z && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_4CSZV && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_1Z && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CZ && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_1Z && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CZ && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CSZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CSZV))
#define KIND_S8_COMP(k)               (                                      ((k) ==NV_MMU_PTE_KIND_S8_2S))
#define KIND_PEERMEM_SUPPORTED(k)     (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2C)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2Z && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CZ && (k) <= NV_MMU_PTE_KIND_Z24S8_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CZ && (k) <= NV_MMU_PTE_KIND_ZF32_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS8_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) ==NV_MMU_PTE_KIND_C32_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C32_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2CRA && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C64_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2CRA && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_LOCALMEM_SUPPORTED(k)    (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2C)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2Z && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CZ && (k) <= NV_MMU_PTE_KIND_Z24S8_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CZ && (k) <= NV_MMU_PTE_KIND_ZF32_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS8_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) ==NV_MMU_PTE_KIND_C32_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C32_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2CRA && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C64_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_2C)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2CRA && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_SYSMEM_SUPPORTED(k)      (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_Z16)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8)||                                      ((k) ==NV_MMU_PTE_KIND_S8)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE))
#define KIND_BOTH_REDUCTION_AND_ARITH(k)(                                      ((k) >=NV_MMU_PTE_KIND_C32_2CBR && (k) <= NV_MMU_PTE_KIND_C32_2CBA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2CBR && (k) <= NV_MMU_PTE_KIND_C32_MS4_2CBA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_2CBR && (k) <= NV_MMU_PTE_KIND_C64_2CBA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2CBR && (k) <= NV_MMU_PTE_KIND_C64_MS4_2CBA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA))
#define KIND_REDUCTION(k)             (                                      ((k) ==NV_MMU_PTE_KIND_C32_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2CRA && (k) <= NV_MMU_PTE_KIND_C32_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2CRA && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS8_MS16_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C64_2CRA && (k) <= NV_MMU_PTE_KIND_C64_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_2CBR)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2CRA && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS8_MS16_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C128_2CR)||                                      ((k) ==NV_MMU_PTE_KIND_C128_MS2_2CR)||                                      ((k) ==NV_MMU_PTE_KIND_C128_MS4_2CR)||                                      ((k) ==NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))
#define KIND_ARITH(k)                 (                                      ((k) >=NV_MMU_PTE_KIND_C32_2CBA && (k) <= NV_MMU_PTE_KIND_C32_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2CBA && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS8_MS16_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_2CBA && (k) <= NV_MMU_PTE_KIND_C64_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2CBA && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS8_MS16_2CRA))
#define KIND_PARTIAL(k)              (0)
#define KIND_COMPBIT_PER_ROPTILE_0(k) ((                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_INVALID)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_Z16)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8)||                                      ((k) ==NV_MMU_PTE_KIND_S8)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) >=NV_MMU_PTE_KIND_X8C24 && (k) <= NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE)))
#define KIND_COMPBIT_PER_ROPTILE_1(k) (((                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)) && (                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CS && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8_2S)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))) || ((                                      ((k) >=NV_MMU_PTE_KIND_S8Z24 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)) && (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_1Z && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_1Z && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_1Z && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS))) || ((                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE)) && (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_1Z && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_1Z && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_1Z && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS))))
#define KIND_COMPBIT_PER_ROPTILE_2(k) (((                                      ((k) >=NV_MMU_PTE_KIND_Z16 && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)) && (                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_4CSZV && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA))) || ((                                      ((k) >=NV_MMU_PTE_KIND_S8Z24 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)) && (                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CS && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8_2S)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))) || ((                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)) && (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_1Z && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_1Z && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_1Z && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS))) || ((                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE)) && (                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CS && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8_2S)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))))
#define KIND_COMPBIT_PER_ROPTILE_4(k) (((                                      ((k) >=NV_MMU_PTE_KIND_S8Z24 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)) && (                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_4CSZV && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA))) || ((                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)) && (                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CS && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8_2S)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR))) || ((                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE)) && (                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_4CSZV && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA))))
#define KIND_COMPBIT_PER_TILE(k)      ((                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_4CSZV && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)) ? 4 : ((                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CS && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8_2S)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR)) ? 2 : ((                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_1Z && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_1Z && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_1Z && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_1Z)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)) ? 1 : 0)))
#define KIND_MSAA_FACTOR(k)           ((                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS2_2C)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS2_2Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS2_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS2_4CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS2_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS2_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS2_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS2_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS2_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS2_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS2_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS2_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS2_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS2_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS2_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS2_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS2_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS2_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS2_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS2_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C128_MS2_2C && (k) <= NV_MMU_PTE_KIND_C128_MS2_2CR)) ? 2 : ((                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS4_2C)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS4_2Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS4_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS4_4CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS4_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS4_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS4_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS4_VC4_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS4_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS4_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS4_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS4_VC4_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS4_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS4_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS4_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_2CSZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC4_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC4_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS4_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS4_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS4_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C128_MS4_2C && (k) <= NV_MMU_PTE_KIND_C128_MS4_2CR)) ? 4 : ((                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS8_2C)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS8_2Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS8_4CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS8_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS8_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8 && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_1ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_2ZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS8_VC8_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS8_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS8_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8 && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_1ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_2ZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2ZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS8_VC8_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS8_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS8_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS8_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_1ZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_1CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_2CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC8_2CSZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8 && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1ZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_1CZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS8_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS8_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS8_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C32_MS8_MS16_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS8_MS16_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C128_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR)) ? 8 : ((                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2C)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS16_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS16_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS16_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS16_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS16_1Z)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS16_2CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CSZV)||                                      ((k) ==NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C32_MS8_MS16_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS8_MS16_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C128_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR)) ? 16 : 1))))
#define KIND_BYPASSABLE(k) ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))) || (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE)) || (                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)) || (                                      ((                                      ((                                      ((k) ==NV_MMU_PTE_KIND_SMSKED_MESSAGE)))||                                      ((0 != 0))))||                                      ((k) ==NV_MMU_PTE_KIND_PITCH)||                                      ((k) ==NV_MMU_PTE_KIND_GENERIC_16BX2)||                                      ((k) >=NV_MMU_PTE_KIND_C32_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2BRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_PITCH_NO_SWIZZLE)))

#define KIND_SUPPORTS_STENCIL_ZBC(k) ((                                      ((k) >=NV_MMU_PTE_KIND_Z16_2C && (k) <= NV_MMU_PTE_KIND_Z16_MS16_2C)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_2CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS8_2CZ)||                                      ((k) ==NV_MMU_PTE_KIND_Z16_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_Z16_4CZ && (k) <= NV_MMU_PTE_KIND_Z16_MS16_4CZ)||                                      ((k) >=NV_MMU_PTE_KIND_S8Z24_2CZ && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_V8Z24_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_V8Z24_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8_2CS && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CS && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_2CZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_2CZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24V8_MS4_VC12_4CSZV && (k) <= NV_MMU_PTE_KIND_Z24V8_MS8_VC24_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_2CS && (k) <= NV_MMU_PTE_KIND_ZF32_MS16_2CZ)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1CZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_2CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_1CS && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_C32_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS2_2C && (k) <= NV_MMU_PTE_KIND_C32_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS4_2C && (k) <= NV_MMU_PTE_KIND_C32_MS4_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C32_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C32_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C64_2CRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS2_2C && (k) <= NV_MMU_PTE_KIND_C64_MS2_2CBR)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS2_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS4_2C && (k) <= NV_MMU_PTE_KIND_C64_MS4_2CRA)||                                      ((k) ==NV_MMU_PTE_KIND_C64_MS4_4CBRA)||                                      ((k) >=NV_MMU_PTE_KIND_C64_MS8_MS16_2C && (k) <= NV_MMU_PTE_KIND_C128_MS8_MS16_2CR)) && (                                      ((k) >=NV_MMU_PTE_KIND_S8Z24 && (k) <= NV_MMU_PTE_KIND_S8Z24_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_Z24S8 && (k) <= NV_MMU_PTE_KIND_Z24S8_MS16_4CSZV)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12 && (k) <= NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_X8Z24_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X16V8S8_MS8_VC24_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X16V8S8_MS4_VC12_1ZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_1CS)||                                      ((k) >=NV_MMU_PTE_KIND_ZF32_X24S8_2CSZV && (k) <= NV_MMU_PTE_KIND_ZF32_X24S8_MS16_2CS)||                                      ((k) >=NV_MMU_PTE_KIND_S8 && (k) <= NV_MMU_PTE_KIND_S8_2S)))
